AMD CTO Mark Papermaster: Our 2nm chips are ready to go

AMD’s new EPYC processors are ready to be produced on TSMC’s cutting edge 2nm process technology in a milestone for the semiconductor firm. 

AMD CTO Mark Papermaster said the “Venice” chips, expected to ship in 2026, are “the first high performance product in the industry to be taped out and brought up” on the Taiwanese semiconductor maker’s 2nm node.

That means they are the first chips fully ready to be produced on the TSCM 2nm equipment after having finished design and testing phases. 

The news comes after AMD’s data centre revenue nearly doubled during 2024 and annual revenue grew 14% to $25.8 billion: “We exited 2024 with well over 50% share at the majority of our largest hyperscale customers” said CEO Lisa Su on a February 2025 Q4 call, with AWS, Alibaba, Google, Microsoft, and Tencent alone launching more than 100 AMD general-purpose and AI instances in the fourth quarter alone.

2nm: TSCM expects rapid scaling

TSCM is gearing up to make chips for customers like AMD on what it describes as “the most advanced technology in the semiconductor industry in both density and energy efficiency” at its Fab 20 site.

TSMC said on its last earnings call that it was “well on track for volume production [on 2nm nodes] in second half of 2025 as scheduled” – adding that it expects the number of new 2nm chips to be higher than earlier technology versions, “fueled by both smartphone and HPC applications.”

The Taiwanese firm says it expects chips made on the 2nm node to be up to 15% faster at the same power or 25% more energy efficient at the same speed versus its 3nm nodes.  AMD meanwhile this week also said that it has produced its first batch of 5th Gen EPYC datacenter server chips from TSMC’s new fabrication facility in Arizona for testing. 

Intel, meanwhile earlier this year said that it has delayed release of its Xeon 'Clearwater Forest' processor through to H1 of 2026. Those chips are being made on its 2nm equivalent 18A manufacturing technology.